HomeCalculatorsEngineeringProcess Capability Calculator (Cp / Cpk)
Engineering calculator

Process Capability Calculator (Cp / Cpk)

Compute design-stage Cp, Cpk, Cpu, and Cpl from process mean, σ, LSL, and USL. Runs locally in your browser. Not Monte Carlo simulated capability.

Instant result
Result
—

Enter values to calculate.

Inputs—
Mode—
Formula—
Trust summary CVP VERIFIED · CVP protocol 1.0.0-proposed · Engineering assurance · Design-stage Cp, Cpk, Cpu, Cpl from stated μ and σ + O3 mpmath tabulated Cp/Cpk. Two-sided USL > LSL.
Input interpretation
Enter values to calculate.
Result
—
Verified scope
Design-stage Cp, Cpk, Cpu, Cpl from stated μ and σ + O3 mpmath tabulated Cp/Cpk. Two-sided USL > LSL.
Assurance
Engineering
Declared partition coverage
PASS · 6/6 declared partitions (centered, off-center-high, off-center-low, negative-cpk, alias, invalid-domain) · Matrix
Deferred
Not Pp/Ppk from a sample, not Cpm/Cpmk, not P/T = 1/Cp, not Monte Carlo simulated indices, not in-control SPC, and not a Cp≥1.33 verdict.
Numerical scope
O2: design-stage Cp/Cpk/Cpu/Cpl vs separate-module identities (≤2 ULP). Not Pp/Ppk, not Cpm, not P/T=1/Cp, not Monte Carlo, not an in-control SPC study. ≤2 ULP vs O3 applies only to the published tabulated Cp/Cpk vectors (centered, off-center, negative Cpk, aliases, σ=2, shifted limits, tight). It is not a whole-domain guarantee and does not cover Pp/Ppk, Cpm, P/T, or Monte Carlo simulated indices.
Known limitations
  • Core CVP does not include live graph, viewport, or pointer interaction.
Model
Design-stage Cp, Cpk, Cpu, Cpl from μ, σ, LSL, USL.
Scope
Design-stage from stated μ and σ — not in-control SPC
Verification
Engine tested · Source checked · v1.0.0 · CVP VERIFIED · CVP protocol 1.0.0-proposed · Engineering assurance · Design-stage Cp, Cpk, Cpu, Cpl from stated μ and σ + O3 mpmath tabulated Cp/Cpk. Two-sided USL > LSL.· View Manifest · CVP overview · Specification
Versions
Calculation 1.0.0 · CVP protocol 1.0.0-proposed · Evidence 2026-09-16.o2-o3
Verification revision
2026-09-16.o2-o3 · 3/3 property · digest d45618000fe2
Legacy regression
5/5 tests · Production surface contract 4/4
Trust layers
Verification VERIFIED · Production CURRENT · overall VERIFIED
Reference
O1 model · O3 expected_values · O3 numerical_behavior · O2 expected_values · O2 numerical_behavior
Interfaces
PASS · UI (SSR) / REST / MCP — ui-ssr is query-result HTML, not a live browser session. Error-path engine·REST·MCP 1/1 (status, code, calculation_version). SSR compared on URL-canonical requested calculations; empty query is idle (not an error) and JSON-typed object/array inputs are REST/MCP-only.
Supplemental domain review
Not performed
Named expert review
Not performed
CVP suite
5/5 golden · 2/2 CVP boundary · 6/6 invalid · 3/3 property · 2/2 metamorphic · 8/8 O3 · 4/4 cross-interface · 4/4 CVP contract · Manifest
Sources
Sources
Evidence
1 legacy golden · 2 legacy boundary · legacy regression suite · 5/5 oracle-backed golden · 6/6 invalid · Artifact integrity PASS
This calculator CURRENT · Public schema 1.0.0 matches · Semantic contract ✓ · Production attested · Public/cache ✓ · Origin ✓
Semantic contract
PASS
Full verification

Manifest identity, reference classes, interfaces, suite, and production records.

Formulas

Core equations used by this calculator.

CpCp = (USL − LSL) / (6σ)
CpuCpu = (USL − μ) / (3σ)
CplCpl = (μ − LSL) / (3σ)
CpkCpk = min(Cpu, Cpl)
iDesign-stage indices from a stated mean and standard deviation. Not in-control SPC subgroups. Not the simulated Cp/Cpk on Monte Carlo Tolerance.

How to use

1

Enter specification limits

LSL and USL in the same unit as μ and σ. USL must be greater than LSL.

2

Enter process mean and σ

σ must be greater than zero. Mean may sit anywhere; Cpk can be negative if the process is off-center past a limit.

3

Read Cpk, then Cp

Cpk is the primary index. Cp ignores centering. Monte Carlo reports simulated design-stage indices — a different contract.

Example calculations

Common configurations with formula and result.

ϟ

Centered

LSL=0 · USL=12 · μ=6 · σ=1

Cp=(12−0)/(6·1)
Cp=2 · Cpk=2
ϟ

Off-center

LSL=0 · USL=12 · μ=8 · σ=1

Cpk=min((12−8)/3, (8−0)/3)
Cp=2 · Cpk=4/3

Process Capability Calculator (Cp / Cpk) specification

Version 1.0.0 · Engine tested

Calculation status

Review policy · Evidence

Definition
Cp = (USL − LSL) / (6σ). Cpu = (USL − μ) / (3σ). Cpl = (μ − LSL) / (3σ). Cpk = min(Cpu, Cpl).
What it calculates
Design-stage Cp, Cpk, Cpu, Cpl from μ, σ, LSL, USL.
Inputs
  • lsl
  • usl
  • mu
  • sigma
Outputs
  • Cp
  • Cpk
  • Cpu
  • Cpl
Formula
Cp=(USL−LSL)/(6σ); Cpk=min(Cpu,Cpl)
Assumptions
  • Design-stage from stated μ and σ — not in-control SPC
  • Not Monte Carlo simulated indices
  • Two-sided limits; USL > LSL
  • Normal-theory 6σ / 3σ formulas
Units
  • same as LSL/USL/μ/σ
Boundary conditions
  • sigma ≤ 0 → VALUE_MUST_BE_POSITIVE
  • USL ≤ LSL → INVALID_INPUT
  • missing lsl/usl/mu/sigma → MISSING_REQUIRED_INPUT
Example
lsl=0 usl=12 mu=6 sigma=1 → Cp=2 Cpk=2
Validation cases

2 published on this page · 5/5 tests · Production surface contract 4/4 · View evidence

  • lsl=0 usl=12 mu=6 sigma=1 → Cp=2 Cpk=2
  • lsl=0 usl=12 mu=8 sigma=1 → Cpk=4/3
Sources
Calculation version
1.0.0

Background

Interpretation and common distinctions.

Compute design-stage process capability from a stated mean and standard deviation.

Supported and not supported

Supported — Two-sided Cp, Cpk, Cpu, Cpl · API engineering.process.capability

Not supported — One-sided only (omit a limit), subgroup SPC, gauge R&R ANOVA, Monte Carlo simulated capability. Pp/Ppk from observations is a different page.

Agent / API notes

Capability id: engineering.process.capability · tool id: process-capability · pin 1.0.0.

{ "lsl": 0, "usl": 12, "mu": 6, "sigma": 1 }

Errors: MISSING_REQUIRED_INPUT, INVALID_NUMBER, VALUE_MUST_BE_POSITIVE, INVALID_INPUT.

Calculator URL stays /calc/engineering/process-capability. There is no /calc/metrology.

Other calculators in this family: Process performance (Pp/Ppk), Process capability (Cpm), Process performance (Ppm), Process capability (Cpmk), Process performance (Ppmk), Tolerance / Uncertainty Workspace, Monte Carlo tolerance, Tolerance stack-up, Uncertainty propagate, Guard band, Test uncertainty ratio TUR, Type A uncertainty, Gauge R&R .

Pp Process performance (Pp/Ppk) › Cpm Process capability (Cpm) › Ppm Process performance (Ppm) › Cpmk Process capability (Cpmk) › Ppmk Process performance (Ppmk) › WS Tolerance / Uncertainty Workspace › MC Monte Carlo tolerance › ±Σ Tolerance stack-up › u(y) Uncertainty propagate › GB Guard band › TUR Test uncertainty ratio TUR › uA Type A uncertainty › GRR Gauge R&R ›
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Frequently asked questions

Key distinctions behind the calculation.

Is this the same Cp as Monte Carlo Tolerance?

No. This page uses a stated μ and σ. Monte Carlo reports simulated design-stage Cp/Cpk from the overall sample. Do not treat either as in-control SPC.

Can Cpk be negative?

Yes. If the mean is outside [LSL, USL], Cpl or Cpu is negative and Cpk follows.

Where does this run?

Locally in the browser by default. The REST and MCP engines call the same metrology-engine process ops.